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NEET 2025 Physics Question 8 Solution

Topic: Semiconductor Electronics: Materials, Devices and Simple Circuits · Official NTA Booklet Code 45
NEET 2025 Physics Question 8: Boolean Logic Simplification of Combined NOR-NAND-AND Network

Question

The output (Y) of the given logic implementation is similar to the output of an/a ___ gate.

✓
Verified Against NTA Final Answer Key
Option (4) : NOR
📚 Semiconductor Electronics: Materials, Devices and Simple Circuits Easy
📋 Given Parameters & Problem Setup
Upper Gate NOR gate with inputs A and B (Output = (A + B)')
Lower Gate NAND gate with inputs B and A (Output = (A · B)')
Output Gate AND gate receiving outputs from both upper and lower gates
⚡

The 30-Second Exam Hall Shortcut: ⚡ Boolean Absorption Shortcut

⏱️ Save ~45 seconds

Y = (A + B)' · (A · B)' = A'B' · (A' + B') = A'B' = (A + B)' = NOR gate!

1 Write output expression: Y = (NOR) · (NAND) = (A + B)' · (A · B)'.
2 By De Morgan’s Law: (A + B)' = A' · B'.
3 By De Morgan’s Law: (A · B)' = A' + B'.
4 Multiply out: (A' · B') · (A' + B') = (A' · B') · A' + (A' · B') · B' = A'B' + A'B' = A'B'.
5 Recall: A' · B' = (A + B)' = NOR gate!
6 Pick Option (4) in under 15 seconds!
🛡️
Why You Can 100% Trust This Shortcut: Boolean Algebra & De Morgan’s Theorems (NCERT Physics · Semiconductor Electronics).
📐

Step-by-Step Rigorous Workflow & Mathematical Proof

Step 1

Identify Individual Gate Expressions

The logic circuit consists of an upper NOR gate, a lower NAND gate, both receiving identical binary inputs A and B, feeding into an AND gate.

Y1=A+B‾,Y2=A⋅B‾,Y=Y1⋅Y2Y_1 = \overline{A + B}, \quad Y_2 = \overline{A \cdot B}, \quad Y = Y_1 \cdot Y_2
  • • Y = (\overline{A + B}) \cdot (\overline{A \cdot B})
Step 2

Boolean Algebraic Simplification

Apply De Morgan’s first and second laws to express the terms in product-of-sums / sum-of-products format:

Y=(AˉBˉ)⋅(Aˉ+Bˉ)=(AˉBˉ⋅Aˉ)+(AˉBˉ⋅Bˉ)=AˉBˉ+AˉBˉ=AˉBˉY = (\bar{A} \bar{B}) \cdot (\bar{A} + \bar{B}) = (\bar{A}\bar{B} \cdot \bar{A}) + (\bar{A}\bar{B} \cdot \bar{B}) = \bar{A}\bar{B} + \bar{A}\bar{B} = \bar{A}\bar{B}
  • • Using the involution rule, A' · B' is universally equivalent to (A + B)', which is the definition of a NOR gate.
Step 3

Truth Table Verification

Verify all four input combinations (A, B):

(0,0)  ⟹  Y1=1,Y2=1  ⟹  Y=1(0,1)  ⟹  Y1=0,Y2=1  ⟹  Y=0(1,0)  ⟹  Y1=0,Y2=1  ⟹  Y=0(1,1)  ⟹  Y1=0,Y2=0  ⟹  Y=0\begin{aligned} (0, 0) &\implies Y_1 = 1, Y_2 = 1 \implies Y = 1 \\ (0, 1) &\implies Y_1 = 0, Y_2 = 1 \implies Y = 0 \\ (1, 0) &\implies Y_1 = 0, Y_2 = 1 \implies Y = 0 \\ (1, 1) &\implies Y_1 = 0, Y_2 = 0 \implies Y = 0 \end{aligned}
  • • The truth table [1, 0, 0, 0] is uniquely identical to a NOR gate.
⭐

360° Option Elimination Engine Key Feature

Diagnose every choice: Know exactly why the right option works and why distractors fail.

4-Option Deep Scan
1 A
✗ Incorrect
Verdict & Scientific Reason:

Incorrect. An AND gate outputs 1 only for (1, 1); here (1, 1) gives 0.

⚠️
Student Fallacy (Why candidates pick this trap): Looking only at the final AND gate and assuming the overall output is AND.
2 B
✗ Incorrect
Verdict & Scientific Reason:

Incorrect. NAND gives [1, 1, 1, 0], whereas this circuit gives [1, 0, 0, 0].

⚠️
Student Fallacy (Why candidates pick this trap): Conflating NAND and NOR truth tables.
3 C
✗ Incorrect
Verdict & Scientific Reason:

Incorrect. OR outputs [0, 1, 1, 1], which is the exact inverse of this circuit.

⚠️
Student Fallacy (Why candidates pick this trap): Inverting the polarity of the NOR gate.
4 D
✓ 100% Correct
Verdict & Scientific Reason:

100% correct. Truth table [1, 0, 0, 0] and Boolean equation Y = (A + B)' rigorously define a NOR gate.

💡
Why this is airtight: None; verified by both algebra and truth table.
⚠️

NTA Trap Alert: Final Gate Appearance Trap

Many students glance at the circuit diagram, notice the final gate is an AND gate, and guess AND without calculating how the upper NOR gate clamps the output to zero for any non-zero input.

🛡️ How to avoid the -1 mark: Never judge a logic circuit by its final gate; always evaluate inputs (0,0) and (1,1).
📖

Core NEET Syllabus Standard

NEET Physics Core Syllabus · Semiconductor Electronics Standard Benchmark
Core Scientific Principle Tested:

"Boolean reduction using De Morgan’s laws reveals equivalent standard logic gate operations."

Syllabus Focus: Logic Gates and Boolean Operations
✓ Core NEET UG Syllabus Anchor Syllabus & Academic Standards ↗
NOR and NAND into AND: NOR dominates completely (NOR wins)!

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